The present disclosure relates to manufacturing of a semiconductor device, and more particularly, to a singulation method of a semiconductor device that allows a sawing process to be performed while protecting a pad.
Generally, a manufacturing process of a semiconductor device can be divided into a fabrication (FAB) process and a packaging process.
The FAB process is a process for forming fine patterns in a silicon wafer to form circuits, and the packaging process is a process for processing the wafer in which the fine patterns have been formed to allow electricity to be supplied to individual chips of the wafer.
Here, the packaging process is a technology for separating only normal chips (or dies) as individual chips and forming them in packages. This is done so that they have electrical and physical characteristics to protect the chips from external, mechanical, physical, and chemical impacts, and allows them to be mounted in a printed circuit board (PCB).
A metal pad opening and bonding process of a semiconductor device will be described below with reference to the accompanying drawings.
FIG. 1 is a cross-sectional view illustrating a sawing process of a semiconductor device according to a related art, and FIG. 2 is a plan view illustrating a pad portion in the case where a sawing process of a semiconductor device according to a related art is applied.
Referring to FIGS. 1 and 2, a packaging process includes: a wafer-mount operation of classifying chips into normal chips and defective chips at a wafer level when FAB-out is completed; a sawing operation of singulating chips from a wafer with reference to a scribe lane; a bonding operation of bonding a singulated chip to a lead frame using epoxy, which is a conductive adhesive, and connecting gold wires of high purity as capillaries, for electrical connection between metal pads of the chip and leads of the lead frame; molding an outer portion of the chip using a thermoset resin to protect a wire bonding-completed chip from an outside physical impact or a chemical change.
The metal pad pattern is opened using a photolithography process before the sawing process.
After that, fine patterns (not shown) forming a chip circuit are formed on a semiconductor substrate 100 using a thin film forming process, a diffusion process, a photolithography process, and an etching process.
Metal pads 103 are formed on an interlayer insulating layer in pad forming regions of a first wafer A and a second wafer B including the fine patterns.
The metal pads can be formed of aluminum (Al).
Also, a passivation layer 101 is formed using a nitride layer or an oxide layer to protect devices and circuits formed of various metals formed on the semiconductor substrate 100 from outside contaminating sources, and to prevent corrosion.
To open the metal pad 103 for connection with an outside power source, a photoresist is coated on an entire surface and selectively exposed and developed to form a photoresist pattern including a pad open region.
An exposed passivation layer 101 is selectively etched through an etching process using plasma using the photoresist pattern as a mask to open the metal pad 103.
A sawing process is performed on the above-manufactured semiconductor substrate.
A first wafer A and a second wafer B are separated from each other through the sawing process.
In detail, the wafer is cut along a scribe lane using a sawing wheel 125 to separate semiconductor devices existing in the circular silicon wafer.
At this point, deionized water 113 is sprayed using a spraying nozzle 123 simultaneously with the cutting to remove silicon powder 111 generated when the wafer is cut during the sawing process.
The above-described metal pad forming process and sawing process of the semiconductor device according to the related art have the following limitations.
While the metal pad 103 is exposed to the outside through a hole 130 of the passivation layer 101 and the sawing process is performed, corrosion is generated at the metal pad 103 due to deionized (DI) water used for removing byproducts 150 such as silicon powder 111.
Also, according to the related art, the metal pad 103 of the semiconductor device is contaminated by the silicon powder 111 generated during the sawing process.
These limitations generate defective semiconductor device leading to reduced yield.